#ifndef	_MOTORCTRL_H
#define	_MOTORCTRL_H
//
#ifdef __cplusplus
extern "C" {
#endif
//
#include "PT32U303.h"
#include "GenTypeDef.h"
#include <stdio.h>
//
#include "MotorInit.h"
#include "PropInteDiff.h"
#include "ProcessTimer.h"
#include "Protect.h"
#include "OtherCtrl.h"
//
#include "FOC_Core_SL_SGSN_M4A1.h"
//
/*-------------------------------------------------------
  -------------  macro declaration of pwm---------
-------------------------------------------------------*/
#define CCE_CCE_Set     ((uint16_t)0x0001)
#define	CCE_CCNE_Set    ((uint16_t)0x0004)
/*============================================================================================================================================================*/
#define  OC1_OC2_OC3_Output_OFF             TMR1->CCE  &= (uint16_t) ~((CCE_CCNE_Set << TMR_Channel_3) | (CCE_CCE_Set << TMR_Channel_3)\
                                                                     | (CCE_CCNE_Set << TMR_Channel_2) | (CCE_CCE_Set << TMR_Channel_2)\
                                                                     | (CCE_CCNE_Set << TMR_Channel_1) | (CCE_CCE_Set << TMR_Channel_1))
// OCx OnOff
#define  OC1_Output_ON                      TMR1->CCE |= (uint16_t)  (CCE_CCE_Set << TMR_Channel_1)
#define  OC1_Output_OFF                     TMR1->CCE &= (uint16_t) ~(CCE_CCE_Set << TMR_Channel_1)
#define  OC1N_Output_ON                     TMR1->CCE |= (uint16_t)  (CCE_CCNE_Set << TMR_Channel_1)
#define  OC1N_Output_OFF                    TMR1->CCE &= (uint16_t) ~(CCE_CCNE_Set << TMR_Channel_1)
//
#define  OC2_Output_ON                      TMR1->CCE |= (uint16_t)  (CCE_CCE_Set << TMR_Channel_2)
#define  OC2_Output_OFF                     TMR1->CCE &= (uint16_t) ~(CCE_CCE_Set << TMR_Channel_2)
#define  OC2N_Output_ON                     TMR1->CCE |= (uint16_t)  (CCE_CCNE_Set << TMR_Channel_2)
#define  OC2N_Output_OFF                    TMR1->CCE &= (uint16_t) ~(CCE_CCNE_Set << TMR_Channel_2)
//
#define  OC3_Output_ON                      TMR1->CCE |= (uint16_t)  (CCE_CCE_Set << TMR_Channel_3)
#define  OC3_Output_OFF                     TMR1->CCE &= (uint16_t) ~(CCE_CCE_Set << TMR_Channel_3)
#define  OC3N_Output_ON                     TMR1->CCE |= (uint16_t)  (CCE_CCNE_Set << TMR_Channel_3)
#define  OC3N_Output_OFF                    TMR1->CCE &= (uint16_t) ~(CCE_CCNE_Set << TMR_Channel_3)
// OCx Mode
#define  OC1_Mode_Timing                    TMR1->CCM1 &= (uint16_t)~TMR_CCM1_OC1MODE; TMR1->CCM1 |= TMR_OCMode_Timing
#define  OC1_Mode_Active                    TMR1->CCM1 &= (uint16_t)~TMR_CCM1_OC1MODE; TMR1->CCM1 |= TMR_OCMode_Active
#define  OC1_Mode_Inactive                  TMR1->CCM1 &= (uint16_t)~TMR_CCM1_OC1MODE; TMR1->CCM1 |= TMR_OCMode_Inactive
#define  OC1_Mode_Toggle                    TMR1->CCM1 &= (uint16_t)~TMR_CCM1_OC1MODE; TMR1->CCM1 |= TMR_OCMode_Toggle
#define  OC1_Mode_PWM1                      TMR1->CCM1 &= (uint16_t)~TMR_CCM1_OC1MODE; TMR1->CCM1 |= TMR_OCMode_PWM1
#define  OC1_Mode_PWM2                      TMR1->CCM1 &= (uint16_t)~TMR_CCM1_OC1MODE; TMR1->CCM1 |= TMR_OCMode_PWM2
#define  OC1_Mode_ForcedAction_Active       TMR1->CCM1 &= (uint16_t)~TMR_CCM1_OC1MODE; TMR1->CCM1 |= TMR_ForcedAction_Active
#define  OC1_Mode_ForcedAction_InActive     TMR1->CCM1 &= (uint16_t)~TMR_CCM1_OC1MODE; TMR1->CCM1 |= TMR_ForcedAction_InActive
//
#define  OC2_Mode_Timing                    TMR1->CCM1 &= (uint16_t)~TMR_CCM1_OC2MODE; TMR1->CCM1 |= (uint16_t)(TMR_OCMode_Timing << 8)
#define  OC2_Mode_Active                    TMR1->CCM1 &= (uint16_t)~TMR_CCM1_OC2MODE; TMR1->CCM1 |= (uint16_t)(TMR_OCMode_Active << 8)
#define  OC2_Mode_Inactive                  TMR1->CCM1 &= (uint16_t)~TMR_CCM1_OC2MODE; TMR1->CCM1 |= (uint16_t)(TMR_OCMode_Inactive << 8)
#define  OC2_Mode_Toggle                    TMR1->CCM1 &= (uint16_t)~TMR_CCM1_OC2MODE; TMR1->CCM1 |= (uint16_t)(TMR_OCMode_Toggle << 8)
#define  OC2_Mode_PWM1                      TMR1->CCM1 &= (uint16_t)~TMR_CCM1_OC2MODE; TMR1->CCM1 |= (uint16_t)(TMR_OCMode_PWM1 << 8)
#define  OC2_Mode_PWM2                      TMR1->CCM1 &= (uint16_t)~TMR_CCM1_OC2MODE; TMR1->CCM1 |= (uint16_t)(TMR_OCMode_PWM2 << 8)
#define  OC2_Mode_ForcedAction_Active       TMR1->CCM1 &= (uint16_t)~TMR_CCM1_OC2MODE; TMR1->CCM1 |= (uint16_t)(TMR_ForcedAction_Active << 8)
#define  OC2_Mode_ForcedAction_InActive     TMR1->CCM1 &= (uint16_t)~TMR_CCM1_OC2MODE; TMR1->CCM1 |= (uint16_t)(TMR_ForcedAction_InActive << 8)
//
#define  OC3_Mode_Timing                    TMR1->CCM2 &= (uint16_t)~TMR_CCM2_OC3MODE; TMR1->CCM2 |= TMR_OCMode_Timing
#define  OC3_Mode_Active                    TMR1->CCM2 &= (uint16_t)~TMR_CCM2_OC3MODE; TMR1->CCM2 |= TMR_OCMode_Active
#define  OC3_Mode_Inactive                  TMR1->CCM2 &= (uint16_t)~TMR_CCM2_OC3MODE; TMR1->CCM2 |= TMR_OCMode_Inactive
#define  OC3_Mode_Toggle                    TMR1->CCM2 &= (uint16_t)~TMR_CCM2_OC3MODE; TMR1->CCM2 |= TMR_OCMode_Toggle
#define  OC3_Mode_PWM1                      TMR1->CCM2 &= (uint16_t)~TMR_CCM2_OC3MODE; TMR1->CCM2 |= TMR_OCMode_PWM1
#define  OC3_Mode_PWM2                      TMR1->CCM2 &= (uint16_t)~TMR_CCM2_OC3MODE; TMR1->CCM2 |= TMR_OCMode_PWM2
#define  OC3_Mode_ForcedAction_Active       TMR1->CCM2 &= (uint16_t)~TMR_CCM2_OC3MODE; TMR1->CCM2 |= TMR_ForcedAction_Active
#define  OC3_Mode_ForcedAction_InActive     TMR1->CCM2 &= (uint16_t)~TMR_CCM2_OC3MODE; TMR1->CCM2 |= TMR_ForcedAction_InActive
// OCx Polarity
#define  OC1_OC2_OC3_Polarity_High          TMR1->CCE &= (uint16_t)~(TMR_CCE_C1P | TMR_CCE_C1NP | TMR_CCE_C2P | TMR_CCE_C2NP | TMR_CCE_C3P | TMR_CCE_C3NP)
#define  OC1_OC2_OC3_Polarity_Low           TMR1->CCE |= (uint16_t) (TMR_CCE_C1P | TMR_CCE_C1NP | TMR_CCE_C2P | TMR_CCE_C2NP | TMR_CCE_C3P | TMR_CCE_C3NP)
//
#define  OC1_Polarity_High                  TMR1->CCE &= (uint16_t)~TMR_CCE_C1P
#define  OC1_Polarity_Low                   TMR1->CCE |= (uint16_t)TMR_CCE_C1P
#define  OC1N_Polarity_High                 TMR1->CCE &= (uint16_t)~TMR_CCE_C1NP
#define  OC1N_Polarity_Low                  TMR1->CCE |= (uint16_t)TMR_CCE_C1NP
//
#define  OC2_Polarity_High                  TMR1->CCE &= (uint16_t)~TMR_CCE_C2P
#define  OC2_Polarity_Low                   TMR1->CCE |= (uint16_t)TMR_CCE_C2P
#define  OC2N_Polarity_High                 TMR1->CCE &= (uint16_t)~TMR_CCE_C2NP
#define  OC2N_Polarity_Low                  TMR1->CCE |= (uint16_t)TMR_CCE_C2NP
//
#define  OC3_Polarity_High                  TMR1->CCE &= (uint16_t)~TMR_CCE_C3P
#define  OC3_Polarity_Low                   TMR1->CCE |= (uint16_t)TMR_CCE_C3P
#define  OC3N_Polarity_High                 TMR1->CCE &= (uint16_t)~TMR_CCE_C3NP
#define  OC3N_Polarity_Low                  TMR1->CCE |= (uint16_t)TMR_CCE_C3NP
// Update Generation
#define  UG_Immediate                       TMR1->EVEG = TMR_DIVReloadMode_Immediate;\
                                            TMR3->EVEG = TMR_DIVReloadMode_Immediate
/*============================================================================================================================================================*/




/*============================================================================================================================================================*/
#define  M_PWM_OUTPUT_ON            OC1_OC2_OC3_Output_OFF;\
                                    \
                                    OC3_Mode_PWM1;\
                                    OC2_Mode_PWM1;\
                                    OC1_Mode_PWM1;\
                                    \
                                    OC3_Polarity_High;\
                                    OC3N_Polarity_High;\
                                    OC2_Polarity_High;\
                                    OC2N_Polarity_High;\
                                    OC1_Polarity_High;\
                                    OC1N_Polarity_High;\
                                    \
                                    UG_Immediate;\
                                    \
                                    OC1_Output_ON;\
                                    OC1N_Output_ON;\
                                    OC3_Output_ON;\
                                    OC3N_Output_ON;\
                                    OC2_Output_ON;\
                                    OC2N_Output_ON                          /*A_PWM_B_PWM*/
//
#define  M_PWM_OUTPUT_OFF          OC1_OC2_OC3_Output_OFF;\
                                    \
                                    OC1_Mode_ForcedAction_Active;\
                                    OC2_Mode_ForcedAction_Active;\
                                    OC3_Mode_ForcedAction_Active;\
                                    \
                                    OC1_Polarity_Low;\
                                    OC1N_Polarity_High;\
                                    OC2_Polarity_Low;\
                                    OC2N_Polarity_High;\
                                    OC3_Polarity_Low;\
                                    OC3N_Polarity_High;\
                                    \
                                    UG_Immediate;\
                                    \
                                    OC1_Output_ON;\
                                    OC1N_Output_ON;\
                                    OC2_Output_ON;\
                                    OC2N_Output_ON;\
                                    OC3_Output_ON;\
                                    OC3N_Output_ON                          /*A_L_B_L*/
//
#define  M_PWM_OUTPUT_A_L_B_PWM     OC1_OC2_OC3_Output_OFF;\
                                    \
                                    OC1_Mode_PWM1;\
                                    OC2_Mode_PWM1;\
                                    OC3_Mode_PWM1;\
                                    \
                                    OC1N_Polarity_High;\
                                    OC2N_Polarity_High;\
                                    OC3N_Polarity_High;\
                                    \
                                    UG_Immediate;\
                                    \
                                    OC1_Output_OFF;\
                                    OC1N_Output_ON;\
                                    OC2_Output_OFF;\
                                    OC2N_Output_ON;\
                                    OC3_Output_OFF;\
                                    OC3N_Output_ON                          /*A_L_B_PWM*/
//
#define  M_PWM_OUTPUT_A_L_B_H       OC1_OC2_OC3_Output_OFF;\
                                    \
                                    OC1_Mode_ForcedAction_Active;\
                                    OC2_Mode_ForcedAction_Active;\
                                    OC3_Mode_ForcedAction_Active;\
                                    \
                                    OC1_Polarity_Low;\
                                    OC1N_Polarity_Low;\
                                    OC2_Polarity_Low;\
                                    OC2N_Polarity_Low;\
                                    OC3_Polarity_Low;\
                                    OC3N_Polarity_Low;\
                                    \
                                    UG_Immediate;\
                                    \
                                    OC1_Output_ON;\
                                    OC1N_Output_ON;\
                                    OC2_Output_ON;\
                                    OC2N_Output_ON;\
                                    OC3_Output_ON;\
                                    OC3N_Output_ON                          /*A_L_B_H*/
//*============================================================================================================================================================*/
#define  SET_TMR1_CCR_(x,y,z)       TMR1->CC1 = x;TMR1->CC2 = y;TMR1->CC3 = z
#define  SET_TMR1_CCR1_(x)          TMR1->CC1 = x
#define  SET_TMR1_CCR2_(x)          TMR1->CC2 = x
#define  SET_TMR1_CCR3_(x)          TMR1->CC3 = x
#define  SET_TMR1_CCR4_(x)          TMR1->CC4 = x
#define  SET_TMR1_AR_(x)            TMR1->AR = x
//
#define  SET_TMR3_CCR_(x,y,z)       TMR3->CC1 = x;TMR3->CC2 = y;TMR3->CC3 = z
#define  SET_TMR3_CCR1_(x)          TMR3->CC1 = x
#define  SET_TMR3_CCR2_(x)          TMR3->CC2 = x
#define  SET_TMR3_CCR3_(x)          TMR3->CC3 = x
#define  SET_TMR3_CCR4_(x)          TMR3->CC4 = x
#define  SET_TMR3_AR_(x)            TMR3->AR = x
//
#define  TMR3_INT_CC1_ENABLE        TMR3->DIE |= TMR_INT_CC1
#define  TMR3_INT_CC1_DISABLE       TMR3->DIE &= (uint16_t)~TMR_INT_CC1
//
#define  TMR3_INT_CC2_ENABLE        TMR3->DIE |= TMR_INT_CC2
#define  TMR3_INT_CC2_DISABLE       TMR3->DIE &= (uint16_t)~TMR_INT_CC2
//
#define  SET_ADC_ExternalTrigInjec_(x)      ADC1->CTRL2 &= ((uint32_t)0xFEFF8FFF);ADC1->CTRL2 |= x
/*============================================================================================================================================================*/
#define  CCR_DATA_(x)        ((uint16_t) (((uint32_t) x * g_PWMLoadData) / 100))           // to calculate the data by duty
/*============================================================================================================================================================*/
//-------------------------------------------------------//
//  -------------  Function declaration ---------
//-------------------------------------------------------//
void  MotorCtrl(void);
//
void  FOC_Core(void);
void  SlideModeCtrl(void);
//
SHORT AngleComp(void);
void  SpeedUpdate(void);
//
void  Speed_PID_Func(void);
void  IBus_PID_Func(void);
void  Curr_D_PID_Func(void);
void  Curr_Q_PID_Func(void);
//
void  IBusUpdate(void);
void  CheckSector(void);
//
void  EnterNoneStage(void);
void  EnterFirstStage(void);
void  EnterSecondStage(void);
void  EnterBrakeStage(void);
//
T_BOOL  FirstStage(void);
T_BOOL  BrakeStage(void);
void    PWM_OnOff(T_PWM_STATUS);
//
void  DebugSave(void);
void  DebugPrint(void);
//
#ifdef __cplusplus
}
#endif
//
#endif	//_MOTORCTRL_H

